After packaging no-lead integrated circuits, for example QFN (Quad Flat No lead) and SON (Small Outline No Lead) type packages, conventional strip testing is advantageously employed. For example, with QFN, after attaching integrated circuit dies to die pads on a leadframe strip, and wire bonding the dies to the leads of the leadframe strip, blocks (rectangular arrays) of the dies and associated wire bonds are encapsulated in a suitable encapsulant material, for example a plastic mold compound. FIG. 1 is a diagrammatic plan view of four such encapsulated blocks 11 (dies and wire bonds not explicitly shown) encapsulated together with a leadframe strip 13, forming an encapsulated leadframe strip 15. FIG. 2 is a diagrammatic side view of one of the encapsulated blocks 11.
The encapsulated leadframe strip 15 is mounted on a UV curable tape for singulation and strip testing. FIG. 3 shows one of the encapsulated blocks 11 on a UV curable tape 31 in the so-called “dead bug” orientation (also depicted in FIG. 2) with the exposed leads and die pads (not explicitly shown) on top, opposite the tape 31. The tape 31 is somewhat flexible and pliable, and is held in (i.e., stretched over) a “tape frame” (not explicitly shown). With the encapsulated leadframe strip 15 mounted on the UV curable tape 31, a singulating saw (similar to a wafer dicing saw) cuts through the encapsulant and the leadframe strip 13 to singulate the encapsulated dies, thereby forming encapsulated die packages 41 as shown in FIG. 4. After singulation, and as shown diagrammatically in FIGS. 4 and 5, the dies within the singulated die packages 41 are electrically isolated from one another (by the cuts through leadframe strip 13) and ready for strip testing.
FIG. 5 is a diagrammatic plan view of an example with twenty die packages (QFN's) 41 that have been singulated from a 5×4 block of encapsulated dies (e.g., one of the blocks 11 shown in FIG. 1) by a first set of three generally uniformly spaced, parallel saw cuts oriented in a first (north/south or N/S) direction, and a second set of four generally uniformly spaced, parallel saw cuts, oriented in a second (east/west or E/W) direction generally perpendicular to the first direction. The singulated die packages 41 of FIGS. 4 and 5 are held in position for strip test only by their adherence to the UV curable tape 31.
The above-described use of the support tape 31 is somewhat delicate (and relatively costly) to implement. Movement of the encapsulated leadframe strip 15 while supported on the flexible tape 31 during sawing may contribute to generation of copper flakes and burrs that may short leads in the finished package. In addition, the movement can contribute to copper smearing onto the mold compound between leads. In addition, the temperature during strip testing must be suitably limited, because the UV curable tape typically does not withstand temperatures above 85° C. However, strip testing at temperatures above 85° C., and as high as 125° C., is often desirable because it simulates stresses on the die that may be occur during actual operation. After strip testing, the molded packages must be picked off the tape, without leaving any residual adhesive on the packages, and deposited in shipping tubes.
It is desirable in view of the foregoing to provide techniques for IC strip testing that avoid difficulties such as those described above with respect to the prior art.